Liquid phase molecular self-assembly for barrier deposition and structures formed thereby

ABSTRACT

Methods and associated structures of forming a microelectronic structure are described. Those methods may comprise dissolving a metal precursor in a non-aqueous solvent in a bath; placing a substrate comprising an interconnect opening in the bath, wherein the metal precursor forms a monolayer within the interconnect opening; and placing the substrate in a coreactant mixture, wherein the coreactant reacts with the metal precursor to form a thin barrier monolayer.

BACKGROUND OF THE INVENTION

In the manufacture of integrated circuits, interconnect structures aregenerally formed on a semiconductor substrate using a dual damasceneprocess. Such a process begins with a trench being etched into adielectric layer and filled with a barrier layer, an adhesion layer, anda seed layer. A physical vapor deposition (PVD) process, such as asputtering process, or an atomic layer deposition (ALD) process, may beused to deposit the barrier layer into the trench. The barrier layerprevents copper, for example, from diffusing into the underlyingdielectric layer. As device dimensions scale down, the aspect ratio ofthe trench may become more aggressive as the trench becomes narrower.This gives rise to issues such as trench overhang during a barrier layerformation, for example, which may lead to pinched-off trench openingsand inadequate gapfill.

BRIEF DESCRIPTION OF THE DRAWINGS

While the specification concludes with claims particularly pointing outand distinctly claiming that which is regarded as the present invention,the advantages of this invention can be more readily ascertained fromthe following description of the invention when read in conjunction withthe accompanying drawings in which:

FIGS. 1 a-1 e represent cross-sections of structures that may be formedwhen carrying out an embodiment of the methods of the present invention.

FIG. 2 represents a flow chart according to an embodiment of the methodsof the present invention.

DETAILED DESCRIPTION OF THE PRESENT INVENTION

In the following detailed description, reference is made to theaccompanying drawings that show, by way of illustration, specificembodiments in which the invention may be practiced. These embodimentsare described in sufficient detail to enable those skilled in the art topractice the invention. It is to be understood that the variousembodiments of the invention, although different, are not necessarilymutually exclusive. For example, a particular feature, structure, orcharacteristic described herein, in connection with one embodiment, maybe implemented within other embodiments without departing from thespirit and scope of the invention. In addition, it is to be understoodthat the location or arrangement of individual elements within eachdisclosed embodiment may be modified without departing from the spiritand scope of the invention. The following detailed description is,therefore, not to be taken in a limiting sense, and the scope of thepresent invention is defined only by the appended claims, appropriatelyinterpreted, along with the full range of equivalents to which theclaims are entitled. In the drawings, like numerals refer to the same orsimilar functionality throughout the several views.

Methods and associated structures of forming a microelectronicstructure, such as a copper interconnect structure, are described. Thosemethods may comprise dissolving a metal precursor in a bath, placing asubstrate comprising an interconnect opening in the bath, wherein themetal precursor forms a monolayer within the opening, and placing thesubstrate in a coreactant mixture, wherein the coreactant reacts withthe metal precursor to form a thin barrier monolayer. The thin conformalbarrier layer may enable the formation of single atomic layer,conformal, smooth barrier films thus enabling gapfill for high aspectratio interconnect structures.

In an embodiment of the method of the present invention, as illustratedby FIGS. 1 a-1 e, a substrate 100 may be placed in a bath 102. The bath102 may comprise a plating bath 102, for example. The substrate 100 maycomprise materials such as silicon, silicon-on insulator, germanium,indium antimonide, lead telluride, indium arsenide, indium phosphide,gallium arsenide, or gallium antimonide. Although several examples ofmaterials from which the substrate 100 may be formed are described here,any material that may serve as a foundation upon which a microelectronicdevice may be built falls within the spirit and scope of the presentinvention.

In an embodiment, the substrate 100 may comprise an interconnect opening105 within a dielectric layer, which may comprise a copper interconnectopening, such as a Damascene structure interconnect opening, forexample. In an embodiment, the interconnect opening may comprise a highaspect interconnect opening, which may comprise an aspect ratio ofgreater than about 3:1. In an embodiment, the interconnect opening maycomprise a portion of an interconnect structure of a microelectronicdevice.

In an embodiment, the bath 102 may comprise a metal precursor and asolvent 103. In an embodiment, the bath 102 may comprise an oxygen andwater-free solvent, such as but not limited such solvents as toluene andalkanes such as pentane, hexane, cyclohexane, acetonitrile. By way ofillustration and not limitation, the metal precursor may comprise abarrier metal, such as titanium, tantalum, hafnium and zirconium.Examples of titanium metal precursors may comprise such compounds asTiCl4, TiMe4, Cp2Ti(CO)2, Cp2TiCl2, and Ti(NEt2)4. In an embodiment, themetal precursor may comprise a single metal center organometalliccompound. In an embodiment, the single metal center comprises one oftitanium, tantalum, zirconium and hafnium.

Examples of tantalum metal precursors may include CpTa(CO)₄, CpTa(CO)₄,(MeCp)Ta(CO)₄, CpTa(CO)₃(R), where R═PPh₃ or AsPh₃, Cp₂TaH₃,CpTa(CO)₃(R), where R=THF, PPh₃, or PCy₃, CpTa(CO)₂(C₅H₆), Cp₂TaH(CO),CP₂TaR(CO) where R=Me, CH₂Ph, or Ph, [Cp₃Ta₃(CO)₇], [Cp₂TaH(CH₂═CHR′],[Cp₂Ta(CH₂CH₂R′)(CNR)], CpTaXMe(CHCMe₃)] where X═Cl or Me,[Cp′TaX(CH₂Ph)(CHPh)] where Cp′=C₅H₄Me, C₅Me₅ and X═Cl or CH₂Ph,Cp*Ta(PMe₃)(C₂H₄)(CHCMe₃), [Cp₂TaMe(CH₂)], [Cp(MeCp)TaMe(CH₂)],[Cp₂TaMe(CHR)], where R═H, Me, Ph, or SiMe₃, [Cp₂Ta(CHPh₂)(CHCMe₃)],[Cp₂Ta(CH₂Ph)(CHPh)], Cp*TaMe₃Ph, Cp*TaMe₂(Me₂CO), Cp*TaMe₂(C₆H₄),Cp₂TaMe₃, (Cp₂TaMe₂)⁺, (Cp₂Ta(CH₂SiMe₃)₂)⁺, Cp₂TaPh₂, Cp*TaMe₄,Cp₂Ta(CP)₂, Cp′Me₂Ta(indanyl or other metalacycle, TBTDET, PDMAT, TaCl5,Cp₂TH(CH₂═CHR) where R=Me, Et, or Prn, Cp₂Ta(cyclopentene),Cp₂Ta(benzyl)(CHPh), Cp₂ClTaCH(tBu), CpTa(CH(tBu)X(PMe₃)₂,Cp₂TaMe(C₂H₄), CH₂═Ta(Cp)₂CH₃, Cp₂TaPrn(C₈H₈), CpTa(CO)_(x)(PhCCPh)where x=1 or 2, Cp₂Ta(allyl), Cp₂M(methallyl), Cp′TaH₃, CpTaCO₄,Cp₂TaH(CO), Cp₂Ta(allyl), Cp₂TaH(propene), Cp₂TaMe₃, Cp*TaCO₄, Cp*TaMe₄,Cp₂(Prn)(CNMe), Cp*TaMe₂(benzene), Cp*Ta(═CHCMe₃)(ethane)PMe₃. Thesingle metal center may also be a Ta carbonyl compound such asTa(CO)₃(C₇H₇), [Ta(CO)₆]⁻, [Ta(CO)₆], Ta₂(CO)₁₂, Ta(CO)₅(Py)⁻,Ta(CO)₂(dmpe)₂, TaX(CO)₂[Me₂P(CH₂)₂PR₂]₂ where X═Cl or I and R=Et oriPr, (RHg)Ta(CO)₆ where R═Et or Ph, Ph₃SnTa(CO)₆,[(C₅H₄Bu)Ta(CO)₃{Si(C₁₈H₃₇)₂}]₂, and [Na(diglyme)₂][Ta(CO)₆], or allylcompounds such as Ta(allyl)₄, Ta(1-methyallyl)(C₄H₆)₆, alkyl, benzyl, oraryl compounds such as TaMe₅, Ta(CH₂Ph)₅, TaMe₃(CH₂SiMe₃)₂, (TaMe₇)₂ ⁻,(TaPh₆)₃ ⁻, (TaPh₆)₄ ⁻, [TaR₆]⁻ where R═Ph or p-tolyl, [TaMe₃(C₈H₈)],TaMe(C₈H₈)(C₈H₈), TaCl₂Me(C₈H₈), TaMe(C₈H₈)(C₈H₈), TaCl₂Me[C(Me)=NR]₂where R═Cy or p-Tol, [Ta(CH₂SiMe₃){N(SiMe₃)₂}₂(CHSiMe₃)], and[Ta(CH₂SiMe₃)₂]₂(μ-CSiMe₃)₂, or alkylidene compounds such as[(Me₃CO)₃Ta[CHC(Me)₃], [Ta(OtBu)₃(CHCMe₃)], [TaXL₂(CHCMe₃)₂ where X═Cl,Me, Np and L=PMe₃ or PMe₂Ph, [{TaX(PMe₃)}₂(μ-N₂)] where X═Cl, Me or Np,Ta(mesityl)(CHCMe₃)₂(PMe₃)₂, [Cp₂TaMe(CH₂)], [Cp(MeCp)TaMe(CH₂)],CpTaC(CMe₃)(Cl)(PMe₃)₃, and Ta(CH₂CMe₃)₃(CHCMe₃) and other Ta singlemetal center organometallic compounds such as complexes of the type:TaXR₄, TaX₂R₃, TaX₃R₂, TaX₄R including metallacyclic compounds.

Examples of hafnium metal precursors may include HfCl4, HfMe4,Cp2Hf(CO)2, Cp2HfCl2 and Hf(NEt2)4. Examples of zirconium metalprecursors include ZrCl4, ZrMe4, Cp2Zr(CO)2, Cp2ZrCl2 and Zr(NEt2)4. Inan embodiment, the metal precursor may be dissolved in the non-aqueoussolvent 103. The metal precursor may be prepared at a desiredconcentration with the solvent in the metal bath 102. In an embodiment,the bath 102 may be warmed to a desired temperature (such as about 25degrees to about 90 degrees Celsius, in some cases) followed byimmersion 107 of the substrate 100 into the bath 102 for a desired time.The bath 102 containing the substrate 100 may be optionally agitated.Subsequently, the substrate 100 may be removed 108 from the bath 102 andmay be rinsed with the organic solvent 103 that does not containdissolved coreactant, in some embodiments.

The metal precursor may be adsorbed onto a surface 106 of theinterconnect opening 105 of the substrate 100. The metal precursor mayform a monolayer 104 on the surface 106 of the interconnect opening 105,which may comprise an atomic layer of the metal precursor that may beadsorbed onto the surface 106 of the substrate 100. In an embodiment,the monolayer may comprise less than about 0.5 angstroms.

The substrate 100 comprising the monolayer 104 may be placed 113 in acoreactant bath 110 mixture comprising a coreactant 112 (FIG. 1 b). Thecoreactant 112 may comprise NH₃, tBuNH2, HNEt2, NEt₃, hexane, catecholborane, BH3/B2H6, CH₄, SiH₄, GeH₄ in some embodiments. The coreactant112 may comprise a compound that may react with the monolayer 104 of themetal precursor to form a barrier monolayer 114. In an embodiment, thecoreactant may exchange ligands with the monolayer 104 (FIG. 1 c). Forexample, as shown in FIG. 1 c, when the metal precursor comprises TaCl₄,the Cl ligand 116 may be adhered 118 to the surface of the substrate100. When the substrate 100 is placed in the coreactant bath 110, aligand 120 of the coreactant 112, in this example the nitrogen atom ofthe NH₃ coreactant, may be exchanged with the CL ligand 116 of the metalprecursor. In this manner, the barrier monolayer 114 may be formed byexchanging ligands of the metal precursor with those of the coreactant.

The substrate 100 may remain in the coreactant bath 110 for a desiredtime, and the formation of the barrier monolayer 114 may be repeated toform successive barrier monolayers (for example 114, 114′, 114″, 114′″that may be formed upon each other) to form a desired, targetedthickness 123 of the barrier layer 122 (FIG. 1 d). For example, thesubstrate 100 may be removed from the coreactant bath 110, rinsed withan organic solvent and the process of monolayer 114 formation may beoptionally repeated.

In an embodiment, the barrier monolayer 114 may comprise a thickness ofabout 1 angstrom or less. In an embodiment, the barrier monolayer 114may comprise between about 0.2 angstroms to about 1.0 angstrom. Thebarrier layer 122 may comprise a thin conformal barrier layer 122 thatmay comprise a plurality of barrier monolayers 114, 114′, 114″, 114′″for example) stacked upon each other.

The barrier layer 122 (that may comprise a single barrier monolayer 114in some cases) may serve to prevent the diffusion of a conductivematerial 124 (such as a copper interconnect structure 124 for example)that may be subsequently formed across the barrier layer 122 (FIG. 1 e).In one embodiment, the barrier layer 122 can range from amonolayer/atomic layer to about 500 angstroms, and may be less than 50angstroms in some cases. In one embodiment, the conductive layer 124 maybe formed utilizing a physical vapor deposition (PVD) and/or anelectroplating/electroless processes, for example. In an embodiment, thebarrier layer 122 may comprise a thin conformal barrier layer.

In one embodiment, access to previously non-investigated novel materialssuch as ZrN, HfN, ZrC, HfC, ZrB and HfB is enabled. Non-stoichiometriccompositions for the various barrier layers that may be formed accordingto the various embodiments of the present invention are possible, asopposed to the stoichiometric limited compositions of prior art PVD andatomic layer deposition (ALD) formed barrier layers. The barriermaterials of the embodiments of the present invention may comprise asignature composition and density associated with the embodiments of theinvention, that may or may not be stoichiometric. Elemental impuritysignatures may be readily detected by common elemental analysis methodsknown in the art.

FIG. 2 depicts a flow chart of a process of forming a thin conformalbarrier layer according to an embodiment of the present invention. Atstep 202, a a metal precursor may be dissolved in a solvent in anorganic nonaqueous bath. At step 204, a substrate comprising aninterconnect opening may be placed in the bath, wherein the metalprecursor forms a monolayer on a surface of the interconnect opening. Atstep 206, the substrate may be rinsed and immersed in a coreactantsolution for a desired time. At step 208, the substrate may be rinsedwith an organic solvent and optionally the process may be repeated. Atstep 210, the substrate may be removed from the organic nonaqueous bath.

As described above, the methods of the present invention enableformation of extremely thin, single atomic layer, conformal, smoothbarrier films that a may be utilized for achieving interconnect gapfillin back end microelectronic applications. A water-free organic platingbath is used to reduced barrier film oxidation. Thus, the reliability ofmicroelectronic devices utilizing the thin conformal barrier layerformed according to the methods of the present invention are greatlyenhanced. Access to previously non-investigated novel materials such asZrN, HfN, ZrC, HfC, ZrB and HfB is enabled.

Although the foregoing description has specified certain steps andmaterials that may be used in the method of the present invention, thoseskilled in the art will appreciate that many modifications andsubstitutions may be made. Accordingly, it is intended that all suchmodifications, alterations, substitutions and additions be considered tofall within the spirit and scope of the invention as defined by theappended claims. In addition, it is appreciated that the fabrication ofa barrier layers within a substrate, such as a silicon substrate, tomanufacture a microelectronic device is well known in the art.Therefore, it is appreciated that the Figures provided herein illustrateonly portions of an exemplary microelectronic device that pertains tothe practice of the present invention. Thus the present invention is notlimited to the structures described herein.

1. A method comprising: dissolving a metal precursor in a non-aqueoussolvent in a bath; placing a substrate comprising an interconnectopening in the bath, wherein the metal precursor forms a monolayerwithin the interconnect opening; and placing the substrate in acoreactant mixture, wherein the coreactant reacts with the metalprecursor to form a barrier monolayer.
 2. The method of claim 1 furthercomprising wherein the metal precursor comprises a single metal centerorganometallic compound.
 3. The method of claim 2 wherein the singlemetal center comprises one of titanium, tantalum, zirconium and hafnium.4. The method of claim 1 wherein the coreactant comprises at least oneof NH₃, tBuNH2, HNEt2, NEt₃, hexane, catechol borane, BH3/B2H6, CH₄,SiH₄, and GeH_(4.)
 5. The method of claim 1 wherein forming the barriermonolayer comprises forming a barrier monolayer layer of at least one ofTaN, TiN, ZrN, ZrC, HfC, ZrB and HfB.
 6. The method of claim 1 whereinthe metal precursor forms a monolayer within the interconnect openingcomprises wherein a monolayer of the metal precursor adheres to thesurface of the interconnect opening.
 7. The method of claim 1 whereinthe coreactant reacts with the metal precursor to form a thin barrierlayer comprises wherein a ligand of the metal precursor is replaced witha ligand of the coreactant to form the barrier monolayer.
 8. The methodof claim 1 further comprising wherein the barrier monolayer comprises athickness of less than about 1 angstrom.
 9. The method of claim 8further comprising wherein successive barrier monolayers layers areformed on each other to achieve a targeted total barrier layerthickness.
 10. A method comprising: providing a substrate comprising aninterconnect opening within a dielectric; placing the substrate in abath comprising a metal precursor dissolved in a solvent, wherein themetal precursor forms an atomic layer on a surface of the interconnectopening; and placing the substrate in a coreactant mixture, wherein thecoreactant reacts with the metal precursor to form a thin barrier layeron the surface; forming a conductive layer on the thin barrier layer.11. The method of claim 10 further comprising wherein the thin barrierlayer comprises a plurality of barrier monolayers, wherein the barriermonolayers comprise between about 0.2 angstroms to about 0.5 angstromsin thickness.
 12. The method of claim 16 wherein forming the thinbarrier layer comprises forming a thin conformal barrier layer on thesurface.
 13. A structure comprising: a substrate comprising aninterconnect opening within a dielectric; a thin conformal barrier layerdisposed on a surface of the opening, wherein the thin conformal barrierlayer comprises at least one barrier monolayer, wherein the barriermonolayer comprises between about 0.2 angstroms to about 1.0 angstrom inthickness.
 14. The structure of claim 13 wherein the thin conformalbarrier layer comprises at least one of TaN, TiN, ZrN, ZrC, HfC, ZrB andHfB.
 15. The structure of claim 13 wherein the thin conformal barrierlayer comprises a plurality of barrier monolayers.
 16. The structure ofclaim 13 wherein the thin conformal barrier layer comprises a thicknessof less than about 50 angstroms.
 17. The structure of claim 13 whereinthe thin conformal barrier layer comprises a non-stoichiometriccomposition.
 18. The structure of claim 13 wherein the interconnectopening comprises a high aspect ratio.
 19. The structure of claim 13further comprising a conductive material disposed on the thin conformalbarrier layer, and wherein the structure comprises an interconnectstructure of a microelectronic device.
 20. The structure of claim 13wherein the structure comprises a high aspect ratio CMOS metallizationstructure.